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ADSP-21462/ADSP-21465/ADSP-21467/ADSP-21469
Power-Up Sequencing
The timing requirements for processor startup are given in
Table 14. Power Up Sequencing Timing Requirements (Processor Startup)
Preliminary Technical Data
Parameter
Min
Max
Unit
Timing Requirements
t RSTVDD
t EVDD-DDR2VDD
t DDR2VDD_IVDD
RESET Low Before V DD_EXT or V DD_DDR2 On
V DD_EXT on Before V DD_DDR2
V DD_DDR2 on Before V DD_INT
0
TBD
TBD
ms
ms
ms
t CLKVDD 1
t CLKRST
t PLLRST
CLKIN Valid After V DD_INT Valid
CLKIN Valid Before RESET Deasserted
PLL Control Setup Before RESET Deasserted
0
10 2
20 3
200
ms
ms
ms
Switching Characteristic
t CORERST
Core Reset Deasserted After RESET Deasserted
4096 × t CK + 2 × t CCLK 4, 5
ms
1
2
3
4
5
Valid V DD_INT assumes that the supply is fully ramped to its 1 volt rail. Voltage ramp rates can vary from microseconds to hundreds of milliseconds depending on the design
of the power supply subsystem.
Assumes a stable CLKIN signal, after meeting worst-case startup timing of crystal oscillators. Refer to your crystal oscillator manufacturer's datasheet for startup time. Assume
a 25 ms maximum oscillator startup time if using the XTAL pin and internal oscillator circuit in conjunction with an external crystal.
Based on CLKIN cycles.
Applies after the power-up sequence is complete. Subsequent resets require a minimum of four CLKIN cycles for RESET to be held low in order to properly initialize and
propagate default states at all I/O pins.
The 4096 cycle count depends on t SRST specification in Table 16 . If setup time is not met, one additional CLKIN cycle may be added to the core reset time, resulting in 4097
cycles maximum.
t R S T V D D
RESET
V DDEXT
V DD_DDR2
V DDINT
t D D R 2V D D _IVD D
t E V D D -D D R 2V D D
t C L K V D D
CLKIN
t C L K R S T
CLK_CFG 1-0
RESETOUT
t PL L R S T
Figure 4. Power-Up Sequencing
t C O R E R S T
Rev. PrC
| Page 22 of 62 | January 2009
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相关PDF资料
ADZS-21479-EZLITE
KIT EVAL EZ BOARD ADSP-2147X
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KIT EVAL EZ BOARD ADSP-2148X
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相关代理商/技术参数
ADZS-21479-EZBRD
功能描述:BOARD EVAL FOR ADZS-2147X RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:SHARC® 标准包装:1 系列:PICDEM™ 类型:MCU 适用于相关产品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，线缆，元件，CD，PICkit 编程器 产品目录页面:659 (CN2011-ZH PDF)
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ADZS-21479-EZLITE
功能描述:KIT EVAL EZ BOARD ADSP-2147X RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:SHARC® 产品培训模块:Blackfin® Processor Core Architecture Overview
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ADZS-21489-EZBRD
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ADZS-21489-EZBRD
制造商:Analog Devices 功能描述:EZ BOARD SUPPORTING SHARC 21489
ADZS-21489-EZLITE
功能描述:KIT EVAL EZ BOARD ADSP-2148X RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:SHARC® 产品培训模块:Blackfin® Processor Core Architecture Overview
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ADZS-2189M-EZLITE
功能描述:开发板和工具包 - 其他处理器 ADZS-2189M-EZLITE
RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压:
ADZS-218X-ICE-2.5V
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